Yakir Vizel

ABOUT ME

YAKIR VIZEL

YAKIR VIZEL

Assistant Professor

I am an Assistant Professor in the Computer Science Department, at the Technion. My focus is on formal verification of hardware and software systems, and the interactions between them.

me

WHAT IS FORMAL VERIFICATION?

As digital systems become an integral part of our everyday lives, and as their usage in safety critical areas increases, the correctness of these systems is now more relevant than ever. Most modern systems include erroneous behaviors that may lead to unstable operation, security flaws, compromising of sensitive data, inefficiencies, and more. This is mostly due to the fact that software and hardware engineers lack the mathematical tools to specify a system and verify that an implementation satisifies a specification.

Our goal is to create innovative tools and techniques to help software and hardware engineers in their quest to create better and safer digital systems.

I am looking for students to take on the next formal verification challenge 🙂